1. Field of the Invention
The present invention relates to an image sensing device and an image sensing system.
2. Description of the Related Art
In Japanese Patent Laid-Open No. 2001-45378, it is disclosed that in an solid-state image sensing device, a row selection line connected to the pixels of each row in a pixel array in which a plurality of pixels a11 to b23 are arrayed in a direction along a row and in a direction along a column is scanned by a vertical shift register VSR (see FIG. 1 of Japanese Patent Laid-Open No. 2001-45378). In this solid-state image sensing device, a vertical signal line that is connected to the pixels of a column in the pixel array is connected to a storage unit 1 at one end and a storage unit 2 at the other end. The vertical shift register VSR transfers the signals of the pixels (a11 to a13) of an odd row in the pixel array to the storage unit 1, as shown in FIG. 2 of Japanese Patent Laid-Open No. 2001-45378. Then, the signals of the pixels (b11 to b13) of an even row in the pixel array are transferred to the storage unit 2 by the vertical shift register VSR, and, in parallel with this operation, a horizontal shift register HSR1 causes the signals of the pixels a11 to a13 to be output sequentially from the storage unit 1 as OUT1. After a prescribed period has elapsed after the horizontal shift register HSR1 started this operation, a horizontal shift register HSR2 causes the signals of the pixels b11 to b13 to be output sequentially from the storage unit 2 as OUT2, in parallel with the operation of the horizontal shift register HSR1. Thus, according to Japanese Patent Laid-Open No. 2001-45378, it is held that because two rows of signals can be independently transferred to two storage units during a given horizontal scanning period, a long post-transfer readout period can be secured, and the readout operation frequency can be kept low.
With Japanese Patent Laid-Open No. 11-150255, a capacitance C, an amplifier 2, a switch SW, a capacitance Csh and an amplifier are connected in this order to a signal wiring SIG that is connected to the pixels in each column of a pixel array, in a photoelectric conversion device (see FIG. 2 of Japanese Patent Laid-Open No. 11-150255). Also, with this photoelectric conversion device, a thin film transistor T is turned on and the signals of photoelectric conversion pixels S are transferred to the capacitance C and stored in the capacitance C, after the capacitance C has been reset by a reset switch 1 in response to a reset signal rc, as shown in FIG. 3 of Japanese Patent Laid-Open No. 11-150255. Then, when the switch SW is turned on by a Smpl pulse, the signals stored in the capacitance C are amplified by the amplifier 2 and transferred to the capacitance Csh in a sample hold circuit 3, and stored in the capacitance Csh. After the switch SW has been turned off, the signals stored in the capacitance Csh are transferred via the amplifier to an A/D converter 7 and A/D converted by the A/D converter 7, before being output to Dout, when an analog multiplexer 4 selects a terminal 4 according to ad0 to ad8 pulses. With this configuration, it is held, according to Japanese Patent Laid-Open No. 11-150255, that the SN ratio can be readily improved, because the signals stored in the capacitance Csh are not affected by the fluctuation in the analog voltage output by the amplifier 2 in a state where the switch SW is turned off.
With the solid-state image sensing device shown in Japanese Patent Laid-Open No. 2001-45378, a horizontal blanking period for at least one row is provided with respect to horizontal transferring operation of the signals of two rows of pixels, as shown in FIG. 2 of Japanese Patent Laid-Open No. 2001-45378. Specifically, a period (transfer a) for transferring the signals of the pixels (a11 to a13) of an odd row to the storage unit 1 is a horizontal blanking period in which neither the horizontal transferring operation of the signals of the pixels (a11 to a13) of the odd row nor the horizontal transferring operation of the signals of the pixels (b11 to b13) of the even row is performed.
Also, with the solid-state image sensing device shown in Japanese Patent Laid-Open No. 2001-45378, the signals of the pixels (a11 to a13) of the odd row are transferred to a differential amplifier D1, and output from the differential amplifier D1 as OUT1. On the other hand, the signals of the pixels (b11 to b13) of the even row are transferred to another differential amplifier, and output from the other differential amplifier as OUT2. From the perspective of the other differential amplifier, the period (transfer b) for transferring the signals of the pixels (b11 to b13) of the even row to the storage unit 2 is a horizontal blanking period in which the horizontal transferring operation of signals is not performed, as shown in FIG. 2 of Japanese Patent Laid-Open No. 2001-45378. Also, as is clear from FIG. 2 of Japanese Patent Laid-Open No. 2001-45378, a horizontal blanking period exists between consecutive horizontal transferring periods for each of the channels.
With the photoelectric conversion device shown in Japanese Patent Laid-Open No. 11-150255, a horizontal blanking period for one row is provided with respect to horizontal transferring operation of the signals of one row of pixels, as shown in FIG. 3 of Japanese Patent Laid-Open No. 11-150255. Specifically, a Ttft period and the following period during which the pulse Smpl is high are provided as a period in which the terminal selection operation by the analog multiprocessor 4 is not performed, that is, a horizontal blanking period.
In the case where a horizontal blanking period for one row is provided every two rows or every one row, the horizontal blanking period in the total readout period from the pixel array to the output amplifier becomes longer when the number of rows in the pixel array increases due to an increase in the number of pixels in the pixel array. As a result, reducing the total readout period becomes difficult.